The 1994 'memory wall' names the same bottleneck that real processing-in-memory hardware now measurably beats in DNA sequence alignment — no GPU, no LLM, involved

Core claims

1. The "memory wall" was named in 1994 by William Wulf and Sally McKee (then his UVA grad student), describing processors outrunning memory delivery. "The memory wall results from two issues: outdated computing architecture, with a physical separation between computer processors and memory; and the fact that a processor can run much faster than the speed at which memory chips can provide data." Source: UVA Today, 2022 (historical/biographical claim, uncontested, Tier 3 acceptable per sources.md). — https://news.virginia.edu/content/say-goodbye-memory-wall

2. Real processing-in-memory hardware (UPMEM DIMMs) speeds up DNA sequence alignment specifically because it routes around the memory-bandwidth bottleneck, not because of more compute. Against powerful dual-socket Xeon CPU baselines, "the limited performance improvement is caused by the inability of the memory to serve memory requests quickly enough" — the same diagnosis as LLM decode. Measured gains: "up to 4.06× speedup" including data-transfer overhead, "up to 28.14× speedup" for compute alone. Source: Bioinformatics (Oxford Academic), peer-reviewed, Tier 1. — https://academic.oup.com/bioinformatics/article/39/5/btad155/7087101

Why this was hop-worthy

The seed note treats "memory-bandwidth-bound" as an LLM-inference-specific fact. It's actually a 30-year-old named problem (the memory wall) with its own hardware-architecture solution (processing-in-memory) already deployed and measured on a completely unrelated workload — genomics — years before anyone needed it for KV caches.

Further leads

• Anton Ertl's "Memory Wall Fallacy" argues the wall isn't universal — cache-friendly workloads scale fine, so "memory-bound" is application-dependent, not a law of physics. Worth its own note as a counter-claim to any future memory-wall capture.
• UPMEM itself (the French PIM startup behind this hardware) — founder/origin story not run down.
• Redis's own creator Salvatore "antirez" Sanfilippo's open-source burnout/return arc — saved from the seed note's source, unrelated tangent (novelty 0.628).

Hop chain

Hop 1: claim-kv-cache-grows-with-context.md (seed, vault note) — the KV cache and decode-phase "memory-bandwidth-bound" framing

• Hook type: mechanism question + cross-time-period bridge
• Hook: "decode is memory-bandwidth-bound" is exactly the phenomenon Wulf & McKee named "the memory wall" in 1994, three decades before LLM inference existed
• Why followed: cross-time bridges get extra weight per the protocol, and this term wasn't itself documented in the vault (max_cosine 0.673, adjacent/frontier band, closest existing notes were computer-architecture-history notes like Ted Hoff/Intel 4004, not the concept itself)
• Key findings: "memory wall" = Wulf & McKee, University of Virginia, 1994/1995, ACM SIGARCH Computer Architecture News — CPU speed (Moore's Law pace) outrunning DRAM latency/bandwidth (7-10%/year gains)

Hop 2: UVA Today — "Say Goodbye to the Memory Wall" — https://news.virginia.edu/content/say-goodbye-memory-wall

• Hook type: the person behind the thing + cross-domain bridge
• Hook: Wulf and McKee's UVA successor lab, CRISP (Center for Research in Intelligent Storage and Processing in Memory), claims processing-in-memory redesigns cut DNA sequence-alignment time "from 20 hours to less than a second"
• Why followed: a hardware-architecture concept suddenly touching genomics is an unexpected two-field bridge; also a live successor institution to check (not just historical trivia)
• Key findings: CRISP is a $29.7M, nine-university DARPA/SRC-backed center (JUMP program) explicitly building "processing-in-memory" hardware; the 20hr->1sec figure is Tier 3 (vendor/university-press, not the underlying paper) — [unverified-quant -- needs primary], so not used as a core claim above

Hop 3: Anton Ertl (TU Wien) — "The Memory Wall Fallacy" — https://www.complang.tuwien.ac.at/anton/memory-wall.html

• Hook type: surprising claim / contrarian voice
• Hook: a credentialed computer architect argues the 1994 paper's "memory wall is inevitable" framing rests on a flawed fixed-miss-rate assumption — "cache miss rates in general are very dependent on the application"
• Why followed: contrarian voices are explicitly prioritized in hook ranking over unfamiliar names; also this hop zooms in on the mechanism debate right after zooming out to the person/institution
• Key findings: the memory wall is real for some workloads and not others; well-designed caches and cache-blocking can keep programs scaling with CPU speed — tempering the "hardware wall is destiny" framing before it gets over-applied

Hop 4: Bioinformatics (Oxford Academic) — "A framework for high-throughput sequence alignment using real processing-in-memory systems" — https://academic.oup.com/bioinformatics/article/39/5/btad155/7087101

• Hook type: mechanism question (zoom-in verification)
• Hook: this is the actual peer-reviewed paper behind the UVA press claim — real UPMEM hardware (2,560 DPUs, 20 UPMEM-DIMMs), not a projection
• Why followed: the news-article quant claim needed a Tier 1-2 primary source per sources.md before it could anchor a capture; this paper supplied one with different, verifiable numbers
• Key findings: 4.06x-28.14x speedups over server-grade Xeon CPUs on DNA alignment algorithms (Smith-Waterman-Gotoh, WFA), with the paper's own diagnosis explicitly naming memory-request-serving speed (not compute) as the bottleneck — the memory wall, independently rediscovered in genomics hardware

Saved hooks not followed:

• Salvatore "antirez" Sanfilippo (Redis creator) burnout-and-return story — from the seed note's own source (Redis blog) — person/culture hook, genuinely interesting but a pure tangent from the seed with no vault connection yet (novelty 0.628) — saved for a separate chain
• High Bandwidth Memory (HBM) chip manufacturing / semiconductor supply chain (SK Hynix, Micron) — from "GPU VRAM" in the seed note — cross-domain to geopolitics/manufacturing, not run down (novelty 0.605)
• UPMEM's own founding story (French PIM startup) — person-behind-the-thing hook surfaced in hop 4, not pursued
• Kevin Skadron / CRISP center's other projects beyond genomics — mechanism hook, not explored

post-worthy: yes — a genuine two-field bridge (1994 computer-architecture theory to 2023 genomics hardware to 2026 LLM inference) with a Tier 1 source anchoring the strongest claim, plus a built-in contrarian check (Ertl) that keeps the framing honest.