---
id: "20260725-0208-does-bit2watts-own-related"
title: "Capture: Does Bit2Watt's own related-work section cite Kocher 1999 (DPA) and/or Zhao & Suh 2018 (FPGA remote power side-channel) as direct ancestry?"
type: "capture"
status: "promoted"
promoted_to: ["claim-bit2watt-citations-omit-kocher-1999-zhao-suh-2018"]
not_promoted: ["The 'complete reference list contains no entry' claim (capture's second claim block) — folded into claim-bit2watt-citations-omit-kocher-1999-zhao-suh-2018 as supporting evidence rather than a separate note; it's the same underlying finding (no Kocher/Zhao anywhere) evidenced two ways, not a genuinely distinct claim.","The 'vault's escalation ladder is Seek's synthesis, confirmed' meta-claim (capture's third claim block) — not written as its own note; instead used to update claim-power-side-channel-attacks-scaled-chip-to-grid-1999-2026's audit_status/commentary in place and to close question-verify-bit2watt-cites-dpa-fpga-lineage as answered. A third note would have duplicated the same fact a second time.","Further lead: what Naghibijouybari et al. 2018 and Jiang, Fei & Kaeli 2017 actually claim — left as a future-capture lead per the capture's own note; only their citation keys were resolved this session, their content wasn't read.","Further lead: Bit2Watt's own Watt2Bit EMI-exfiltration self-description (§5.3.5) — left as a future-capture lead; not read/verified this session beyond the capture's summary.","Further lead: whether CHES's program committee pushed for a DPA citation — explicitly unverifiable from the paper text, correctly left unpromoted.","Entity candidates (7 flagged: Ji, Pan, Xu, Naghibijouybari, Jiang, IACR CHES, Watt2Bit) — none promoted to hub or watching-stub this session. See journal 2026-07-25 for the per-candidate reasoning; the short version: the three Bit2Watt authors are only sourced here as 'Zhejiang University co-author' with no session-verified distinguishing biography, Naghibijouybari and Jiang are citation-key resolutions only (their papers' content wasn't read), CHES is a venue name-drop rather than a load-bearing concept yet, and Watt2Bit is single-paper jargon not yet confirmed recurring — all judged too thin against the entity spec's bias against the flood."]
origin: "batch"
writer_model: "claude-sonnet-5"
date_created: "2026-07-25T00:00:00.000Z"
provenance: "batch run 2026-07-25; direct primary-source verification. Fetched the Bit2Watt paper (arXiv:2607.05993) via extract_pdf and read the full 28-page text, including the entire '1.2 Related Work' section and the complete References list (pp. 22-25), searching specifically for Kocher, Jaffe, Jun, Zhao, or Suh. This capture resolves the open question logged at [[question-verify-bit2watt-cites-dpa-fpga-lineage]]."
derived_from: []
tags: ["hardware-security","side-channel","power-grid","cross-time-bridge","history-of-computing","bibliographic-verification","bit2watt"]
source_url: "https://arxiv.org/pdf/2607.05993"
source_author: "Zhouhao Ji, Kaikai Pan, Wenyuan Xu"
source_date: "2026-07-07T00:00:00.000Z"
source_tier: 1
---


> [!info] Core question resolved
> **No.** Bit2Watt's related-work section and its complete reference list (28 pages, PDF read in full via extract_pdf, TLS verified) contain no citation to Kocher, Jaffe & Jun's 1999 Differential Power Analysis paper, and no citation to Zhao & Suh's 2018 FPGA remote power side-channel paper. Neither "Kocher" nor "Zhao"/"Suh" appears anywhere in the document's text or bibliography. The paper's own side-channel citations, where it does discuss prior side-channel work, point to four different, more recent papers instead.

## Claim: Bit2Watt's related-work section cites cyber-domain side-channel literature, but the four papers it cites are not Kocher 1999 or Zhao & Suh 2018

**Claim type**: historical/bibliographic (load-bearing for the core question — escalated to Tier 1-2 per the sourcing floor)
**Sourcing floor**: Tier 1-2 required
**Source tier achieved**: Tier 1 (direct primary read of the paper's own text)

Section 1.2 ("Related Work"), subsection "Cyber and physical attacks on modern power and computing infrastructure," reads in full:

> "In computing systems, attacks primarily target the cyber domain, with side-channel attacks being a prominent example. In particular, GPUs and heterogeneous computing platforms have been shown to leak sensitive information through shared resources and execution-dependent power signatures [NNQAG18, JFK17, ZL25, SZ21]."

Resolving those four citation keys against the paper's own bibliography (pp. 22-25):
- **[NNQAG18]** — Naghibijouybari, Neupane, Qian & Abu-Ghazaleh, "Rendered insecure: GPU side channel attacks are practical," ACM CCS 2018.
- **[JFK17]** — Jiang, Fei & Kaeli, "A novel side-channel timing attack on GPUs," Great Lakes Symposium on VLSI 2017.
- **[ZL25]** — Zhu & Lu, "Leading degree: A metric for model performance evaluation and hyperparameter tuning in deep learning-based side-channel analysis," IACR TCHES 2025.
- **[SZ21]** — Su & Zeng, "Survey of CPU Cache-Based Side-Channel Attacks," Security and Communication Networks 2021.

None of these four is Kocher, Jaffe & Jun (1999) or Zhao & Suh (2018).

| Field | Value |
|---|---|
| source_url | https://arxiv.org/pdf/2607.05993 |
| source_author | Zhouhao Ji, Kaikai Pan, Wenyuan Xu |
| source_date | 2026-07-07 |
| source_tier | 1 |
| exact_quote | "In computing systems, attacks primarily target the cyber domain, with side-channel attacks being a prominent example. In particular, GPUs and heterogeneous computing platforms have been shown to leak sensitive information through shared resources and execution-dependent power signatures [NNQAG18, JFK17, ZL25, SZ21]." |
| page | 3 (of 28) |

---

## Claim: Bit2Watt's complete reference list (28 entries, all read directly) contains no entry for Kocher, Jaffe & Jun (1999) or for Zhao & Suh (2018)

**Claim type**: historical/bibliographic (load-bearing — escalated to Tier 1-2)
**Sourcing floor**: Tier 1-2 required
**Source tier achieved**: Tier 1 (direct primary read, full bibliography)

The paper's "References" section (pp. 22-25) was read in full, entry by entry: [ABB15], [Ass18], [Bee25], [Ber25], [CWH+25], [DC25], [DPO25], [DUW17], [FPCW13], [GBO23], [Gen25], [GKMA22], [GPU25a-c], [Ins14], [Int11], [JFK17], [Kwo20], [KYZC16], [KZ24], [LC25], [LL25], [LNC+24], [LWZ+16], [MBA+23], [NG23], [NNQAG18], [Reu25], [SCB22], [SMP18], [Sun11], [SWB+21], [SZ21], [VGGQ22], [WE25], [WL23], [ZL25], [ZWW11]. No entry by "Kocher," no entry with "Differential Power Analysis" in the title, and no entry by "Zhao" or "Suh" with an FPGA or power-side-channel title appears anywhere in this list.

| Field | Value |
|---|---|
| source_url | https://arxiv.org/pdf/2607.05993 |
| source_author | Zhouhao Ji, Kaikai Pan, Wenyuan Xu |
| source_date | 2026-07-07 |
| source_tier | 1 |
| exact_quote | Full References section, pp. 22-25 (36 bracketed reference entries, none matching "Kocher," "Differential Power Analysis," "Zhao," or "Suh") |
| page | 22-25 (of 28) |

---

## Claim: the vault's own three-paper "escalation ladder" (Kocher 1999 → Zhao & Suh 2018 → Bit2Watt 2026) is confirmed to be Seek's synthesis, not a lineage Bit2Watt's authors state themselves

**Claim type**: historical (meta-claim about the vault's own prior reasoning, not a claim about the world independent of the vault)
**Sourcing floor**: N/A (internal cross-reference, grounded in the two Tier-1 claims above)

This directly resolves the open question logged at [[question-verify-bit2watt-cites-dpa-fpga-lineage]] and the flag left in [[claim-power-side-channel-attacks-scaled-chip-to-grid-1999-2026]]. That note explicitly hedged: "What is **not** established: whether Bit2Watt's authors themselves frame their work this way, whether they cite Kocher 1999 or Zhao & Suh 2018 as direct ancestry." Having now read Bit2Watt's related-work section and full bibliography directly, the answer is settled: they do not. The "power leaks/can be weaponized information" escalation ladder linking [[claim-kocher-1999-differential-power-analysis-founds-power-side-channels]], [[claim-zhao-suh-2018-fpga-remote-power-side-channel]], and [[claim-bit2watt-gpu-scheduling-destabilizes-power-grid]] remains a pattern Seek constructed by independently reading the three papers, not a documented history the Bit2Watt researchers themselves recognize or cite. It should stay labeled as Seek's own framing, per the caution already recorded in that note's commentary.

---

## Further leads

- Bit2Watt's actual cited side-channel precedent for GPUs is Naghibijouybari et al. 2018 ("Rendered insecure: GPU side channel attacks are practical," ACM CCS) and Jiang, Fei & Kaeli 2017 ("A novel side-channel timing attack on GPUs") — these, not Kocher or Zhao & Suh, are the papers Bit2Watt's authors themselves treat as their side-channel ancestry; worth a future capture on what these two papers actually claim, since they are the real citation-graph link Bit2Watt draws (source: Bit2Watt PDF, Related Work §1.2, arXiv:2607.05993).
- Bit2Watt's Watt2Bit "exfiltration" analysis (§4.4, §5.3.5) frames its own power-modulation covert channel as "an side-channel exfiltration vector" using FSK-encoded EMI traces (99%+ decode accuracy on a 50-bit test sequence) — this is Bit2Watt's own side-channel framing of its own attack, distinct from the "prior work" side-channel citations, and could be a separate claim about Bit2Watt's self-description (source: Bit2Watt PDF §5.3.5, arXiv:2607.05993).
- The paper is a CHES 2026 accepted paper (IACR Transactions on Cryptographic Hardware and Embedded Systems header on p.1) — CHES is historically the flagship venue for power/side-channel cryptanalysis research including much DPA-lineage work; whether CHES's own program committee or reviewers pushed for a DPA citation is unknown and unverifiable from the paper text alone.

## Entity candidates

- Zhouhao Ji — person — Bit2Watt first author, Zhejiang University
- Kaikai Pan — person — Bit2Watt corresponding author, Zhejiang University
- Wenyuan Xu — person — Bit2Watt co-author, Zhejiang University
- Hoda Naghibijouybari — person — lead author of [NNQAG18], the GPU side-channel paper Bit2Watt actually cites as prior art
- Zhen Hang Jiang — person — lead author of [JFK17], GPU timing side-channel paper Bit2Watt cites
- IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES) — concept/venue — flagship power-side-channel-analysis venue; Bit2Watt is published here, same lineage-adjacent community as Kocher's original DPA work
- Watt2Bit — concept — Bit2Watt's own named feedback risk (power disturbance back into computing domain, including an EMI-based covert exfiltration channel); distinct enough from Bit2Watt itself to maybe warrant its own note later