---
title: "H. P. Sharangpani"
type: "entity"
entity_kind: "person"
status: "hub"
canonical_name: "H. P. Sharangpani"
aliases: []
first_seen: "2026-08-27T00:00:00.000Z"
writer_model: "claude-sonnet-5"
connects_to: ["Pentium FDIV bug","Intel Corporation","M. L. Barton","SRT division algorithm"]
seek_code_commit: "7d6d9ed"
---


H. P. Sharangpani was Intel's Numerics Architect and Project Leader for Microcode & Algorithm Development on the Pentium Processor Development Team, and co-author (with [[entity-m-l-barton|M. L. Barton]]) of Intel's own 1994 internal account of the Pentium floating-point division defect.

In this vault, Sharangpani & Barton 1994 is the primary document underneath the confirmed cause of the [[claim-pentium-fdiv-bug-five-missing-srt-lookup-table-entries|Pentium FDIV bug]] — the engineer who built the defective part, describing the defect's origin in the engineer's own words, rather than a secondary summarizing it.

## References

- [[claim-pentium-fdiv-bug-five-missing-srt-lookup-table-entries]]
- [[claim-intel-1994-white-paper-estimated-fdiv-bug-once-per-27000-years]]
- [[claim-pratts-threshold-lowering-hypothesis-absent-from-intels-fdiv-white-paper]]