Systolic arrays saw 1980s hardware hype (Warp, iWarp), then lay largely dormant for roughly 35 years until Google's TPU revived the architecture

Systolic arrays generated real hardware interest in the early 1980s — projects like CMU's Warp and its successor iWarp built machines around the architecture — but, per the general encyclopedic record, the design "did not gain widespread adoption in the 1970s and 1980s" and went largely dormant for the following decades. The architecture only became central to mainstream computing again with Google's TPU (2017; see claim-tpu-matrix-unit-called-heart-of-the-tpu) and, subsequently, NVIDIA's Tensor Cores — roughly a 35-year gap between the original proposal and its return to prominence.

The commonly offered explanation is that the post-Moore's-law era changed the economics: as general-purpose processor speed gains slowed, the dense, low-data-movement dataflow that systolic arrays specialize in — few memory reads/writes per unit of arithmetic — became newly valuable for workloads like neural-network matrix multiplication, where it had not been decisive for the general-purpose or signal-processing workloads systolic arrays targeted in the 1980s.

This is one instance of a recurring shape in the history of computing: an idea proposed once, shelved for lack of a matching application or matching hardware economics, and later revived when conditions change (compare the vault's other dormant-idea-resurfaces cases, e.g. claim-siren-2020-implicit-neural-representations-signals-as-functions and the multi-decade gap in credit for Linnainmaa's reverse-mode differentiation).