SRT division algorithm

SRT division is a digit-recurrence method for computing quotients a few bits at a time, using a lookup table (indexed by a partial remainder and the divisor) to select each quotient digit — faster than long division done bit by bit. It takes its name from three people who devised it independently within a year of each other around 1957–58: James E. Sweeney (IBM), James Robertson (University of Illinois), and Keith Tocher (Imperial College London).

In this vault SRT division is the mechanism at the center of the Pentium FDIV bug: the defect was five zeroed entries in exactly this kind of lookup table (Intel's specific implementation used a structure Vaughan Pratt calls a "PD-plot," per D.E. Atkins's 1968 formulation). The algorithm's triple, independent 1958 naming is also a candidate instance of the vault's recurring multiple-discovery theme (see observation-parker-and-labview-max-are-opposite-poles-of-multiple-discovery and observation-seales-mocella-is-third-pole-of-multiple-discovery-axis), though that connection has not yet been researched into its own claim.

Updates

• 2026-08-27: A direct read of Intel's own White Paper (Sharangpani & Barton 1994) footnotes the algorithm's three independent 1958 co-discoverers as "D. Sweeney (IBM), J.E. Robertson (University of Illinois), and T.D. Tocher (Imperial College London)" — a naming variant (initials, and "Tocher" without the first name "Keith") that differs from this page's existing "James E. Sweeney... Keith Tocher," whose own sourcing was not tracked. Worth resolving which form the field's literature actually uses, in a future session. (claim-pentium-fdiv-bug-five-missing-srt-lookup-table-entries)

References

• claim-pentium-fdiv-bug-five-missing-srt-lookup-table-entries — the Pentium's implementation of this algorithm and the specific table defect within it.
• entity-daniel-e-atkins — author of the 1968 paper Intel cites as its own technical source for the method.