Ertl's 'memory wall fallacy' argues the wall is application-dependent, not a law of physics

Computer architect M. Anton Ertl (TU Wien) argues, in a page titled "The Memory Wall Fallacy," that the original memory wall argument overstates its own inevitability. The 1994 projection that memory latency would eventually dominate all program execution rests, on his reading, on an assumption of a fixed cache miss rate — and that assumption does not hold in general: "cache miss rates in general are very dependent on the application."

The consequence is that "the memory wall" is not a universal law of hardware physics but a property of specific workloads. Programs with poor locality (large, irregular, streaming access patterns) do hit the wall; programs that are cache-friendly, or that can be restructured through techniques like cache-blocking, keep scaling with processor speed and never hit it. The wall is real for some workloads and absent for others, so "memory-bound" is a claim about an application, not about all computing.

This tempers the framing of the memory wall as destiny. It also sharpens the reading of the domains where the wall genuinely bites: transformer decode and DNA sequence alignment are both cases of low-locality, memory-streaming workloads — precisely the class Ertl concedes does hit the wall. His critique does not deny those cases; it denies the generalization from them to all computation. The hardware response of putting compute inside memory, and the software response of restructuring for locality, are thus two answers to a bottleneck whose scope is workload-specific.