The roofline model formalizes a system's attainable performance as the minimum of peak compute throughput and memory-bandwidth × operational intensity

Williams, Waterman, and Patterson's 2009 "Roofline: An Insightful Visual Performance Model" formalizes a system's achievable throughput as Attainable Performance = min(Peak FLOPs, Bandwidth × Operational Intensity) — a hardware system can never run faster than either its raw compute ceiling or the rate at which memory bandwidth can feed it data, whichever is lower. Operational intensity is the ratio of arithmetic operations performed per byte moved from memory; the "ridge point" is the operational intensity at which a workload transitions from being memory-bound (below the ridge) to compute-bound (above it).

The paper's founding premise, stated plainly, is that "off-chip memory bandwidth will often be the constraining resource" for real workloads — not raw arithmetic throughput, which had been the traditional focus of hardware performance analysis. This reframes performance engineering: adding more arithmetic units to a chip does nothing for a workload sitting below its ridge point, because the bottleneck is data delivery, not computation.

The model is general-purpose — it applies to any compute system, not specifically AI hardware — but it is the formal apparatus Google's engineers used to size and evaluate the TPU (see claim-tpu-most-nn-workloads-memory-bandwidth-bound), and it is the general theory that the vault's existing observation about LLM-inference decode (claim-llm-inference-prefill-decode) silently instantiates as a specific case: decode has low operational intensity (one token's arithmetic per full weight read), which places it below the ridge point and makes it memory-bandwidth-bound by roofline's own definition.